| 製品概要 |
Complies with IEEE 1394-1995 Standard
Supports the transmission method, media and protocol interface defined in the standard
Transmits and receives correctly formatted 1394 packets and generates and inspects the 32-bit cyclic redundancy check (CRC)
Is capable of being a cycle master and supports reception of isochronous data on two channels
Supports bus speeds of 100, 200 and 400 Mbps
Contains Asynchronous, Isochronous, and General-Receive FIFOs that are software adjustable for optimal size and performance characterization
Detects lost cycle start messages
Host Bus Interface:
Provides chip control with directly addressable registers and is interrupt driven to minimize host polling
Has a generic 32-bit host bus interface |
