J-PKTBRDG
| 製品カテゴリ | 設計IP |
|---|---|
| 製品種別 | ネットワーク回路：その他 |
| 製品・サービス名 | J-PKTBRDG |
| 販売元会社名 | Jennic Limited |
| 国名 | 英国 |
| 開発元url | http://www.jennic.com/ |
| 製品概要 | Packet Bridge Metro network edge applications Channelised FIFO and Multiplexer for use in bridge chips and on chip multiplexing applications. (1) Available in a variety of configurations depending on maximum number of channels multiplexing ports FIFO capacity operating speed etc (2) contains integrated FIFOs and muliplexors to merge a number of independant channelsied packet flows onto a single bus. (3) Performs packet pre-processing and pipleined reads to maximise bus utilisation efficiency. |
| 製品詳細情報 | Delivery 4 weeks after PO |
| その他製品関連情報 | |
| 問合せ先会社名 | Jennic Limited |
| 問合せ先電話番号 | 03-5449-7501 |
| 問合せURL | http://www.jennic.com/ |
